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A3425 Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Features and Benefits
Two matched Hall effect switches on a single substrate Sensor Hall element spacing approximately 1 mm Superior temperature stability 3.3 to 18 V operation Integrated ESD diode from OUTPUT and VCC pins to GND High-sensitivity switchpoints Robust structure for EMC protection Solid-state reliability
Description
The A3425 is a dual-output-channel, bipolar switch with each channel comprising a separate complete Hall-effect sensor circuit with dedicated Hall element and separate digital output for speed and direction signal processing capability. The independent Hall elements (E1 integrated with OUTPUTA, and E2 integrated with OUTPUTB) are photolithographically aligned to better than 1 m. Maintaining this accurate mechanical location between the two active Hall elements eliminates the major manufacturing hurdle encountered in fine-pitch detection applications. The A3425 is a highly sensitive, temperature-stable magnetic sensing device, which is ideal for use in ring magnetbased speed and direction systems used in harsh automotive and industrial environments. The A3425 contains two independent Hall effect switches, and has a monolithic IC that accurately locates the two Hall elements, E1 and E2, approximately 1 mm apart. The digital outputs are 90 out of phase so that the outputs are in quadrature, with the proper ring magnet design. This allows for easy processing of speed and direction signals. Extremely low-drift amplifiers guarantee symmetry between the switches to maintain signal
Package: 8 pin SOIC (suffix L), and 4 pin SIP (suffix K)
Continued on the next page... Not to scale
Typical Application
VOUTPUTB VOUTPUTA
2
OUTPUTA
VSupply 100
1
A3425
VCC OUTPUTB
3
GND
4 0.1 uF
Using unregulated supply
A3425DS-Rev. 6
A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
that are symmetrical between the two switches. The A3425 is available in a plastic 8-pin SOIC surface mount package (L) and a plastic 4-pin SIP (K), both in two operating temperature ranges. Each package is available in a lead (Pb) free version with 100% matte tin plated leadframe.
Description (continued) quadrature. The patented chopper stabilization technique cancels offsets in each channel, and provides stable operation over the operating temperature and voltage ranges. An on-chip regulator allows the use of this device over a wide operating voltage range. Post-assembly factory programming provides sensitive switchpoints
Selection Guide
Part Number A3425EK-T A3425EKTN-T A3425EL-T A3425ELTR-T A3425LK-T A3425LKTN-T A3425LL-T A3425LLTR-T
1Pb-based
Pb-free1 Yes Yes Yes Yes Yes Yes Yes Yes
Packing2 Bulk, 500 pieces/bag 13-in. reel, 4000 pieces/reel Bulk, 500 pieces/bag 13-in. reel, 3000 pieces/reel Bulk, 98 pieces/bag 13-in. reel, 4000 pieces/reel Bulk, 500 pieces/bag 13-in. reel, 3000 pieces/reel
Mounting 4-pin SIP through hole
Ambient, TA
-40C to 85C 8-pin SOIC surface mount 4-pin SIP through hole -40C to 150C 8-pin SOIC surface mount
variants are being phased out of the product line. The variants cited in this footnote are in production but have been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of this device is currently restricted to existing customer applications. The variants should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: May 1, 2006. These variants include: A3425EL, A3425ELTR, A3425LL, and A3425LLTR. for additional packing options.
2Contact Allegro
Absolute Maximum Ratings
Characteristic Supply Voltage Reverse Battery Voltage Output Off Voltage Output Sink Current Magnetic Flux Density Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Symbol VCC VRCC VOUTPUT IOUTPUT(Sink) B TA TJ(max) Tstg Range E Range L Notes Rating 26.5 -16 VCC Internally Limited Unlimited -40 to 85 -40 to 150 165 -65 to 170 Units V V V - - C C C C
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
2
A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Functional Block Diagram
VCC
Programmable Trim
Regulator
8 Bits
Channel A 4 Bits Dynamic Offset Cancellation Hall Element E1 Sample and Hold OUTPUTA LowPass Filter Output Drive
Amp
Channel B 4 Bits Dynamic Offset Cancellation Hall Element E2 Sample and Hold OUTPUTB LowPass Filter Output Drive
Amp
GND
Terminal List Table Package K Package L
1
E1 E2 1 2 3 1 2 3 4 4 E1 8 7 6 5
Pin Number Package K Package L 1 2 3 4 5-8
Name VCC
Function Connects power supply to on-chip voltage regulator
2 3 4 -
OUTPUTA Output from E1 via first Schmitt circuit OUTPUTB Output from E2 via second Schmitt circuit GND NC Terminal for ground connection No connection
E2
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
OPERATING CHARACTERISTICS Valid over operating temperature ranges unless otherwise noted; typical data applies to
VCC = 12 V, and TA = 25C Characteristic ELECTRICAL CHARACTERISTICS Supply Voltage1 Output Leakage Current Output Rise Time Output Fall Time Supply Current Low Output Voltage Output Sink Current Output Sink Current, Continuous2 VCC IOUTPUT(OFF) tr tf ICC(OFF) ICC(ON) VOUTPUT(ON) IOUTPUT(SINK) IOUTPUT(SINK)C IOUTPUT(SINK)P fC TJ < TJ(max) ,VOUTPUT = 12 V t < 3 seconds Operating; TA 150C Either output CLOAD = 20 pF, RLOAD = 820 CLOAD = 20 pF, RLOAD = 820 B < BRP(A) ,B < BRP(B) B > BOP(A) ,B > BOP(B) Both outputs; IOUTPUT(SINK) = 20 mA; B > BOP(A), B > BOP(B) 3.3 - - - - - - - - - - - <1 1.8 1.2 3.5 4.0 160 - - - 340 18 10 - - 6.0 6.0 500 20 70 220 - V A s s mA mA mV mA mA mA kHz Symbol Test Conditions Min. Typ. Max Units
Output Sink Current, Peak3 Chopping Frequency
TRANSIENT PROTECTION CHARACTERISTICS Supply Zener Voltage Supply Zener Current4 Reverse-Battery Current VZ IZ IRCC ICC = 15 mA VS = 28 V VRCC = -18 V, TJ < TJ(max) 28 - - 33 - 2 37 9.0 15 V mA mA
Continued on the next page...
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
4
A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
OPERATING CHARACTERISTICS (continued) Valid over operating temperature ranges unless otherwise noted; typical
data applies to VCC = 12 V, and TA = 25C Characteristic MAGNETIC CHARACTERISTICS, K Operate Point: B > BOP Release Point: B < BRP Hysteresis: BOP(A) - BRP(A), BOP(B) - BRP(B) Symmetry: Channel A, Channel B, BOP(A) + BRP(A), BOP(B) + BRP(B) Operate Symmetry: BOP(A) - BOP(B) Release Symmetry: BRP(A) - BRP(B) Symbol Package5 BOP(A), BOP(B) BRP(A), BRP(B) BHYS(A), BHYS(B) SYMA, SYMB SYMAB(OP) SYMAB(RP) - -35 5 -40 -30 -30 7 -7 16 - - - 35 - 40 40 30 30 G G G G G G Test Conditions Min. Typ. Max Units
MAGNETIC CHARACTERISTICS, L Package5 Operate Point: B > BOP Release Point: B < BRP Hysteresis: BOP(A) - BRP(A), BOP(B) - BRP(B) Symmetry: Channel A, Channel B, BOP(A) + BRP(A), BOP(B) + BRP(B) Operate Symmetry: BOP(A) - BOP(B) Release Symmetry: BRP(A) - BRP(B)
1 2
BOP(A), BOP(B) BRP(A), BRP(B) BHYS(A), BHYS(B) SYMA, SYMB SYMAB(OP) SYMAB(RP)
- -30 5 -35 -25 -25
7 -7 14 - - -
30 - 35 35 25 25
G G G G G G
When operating at maximum voltage, never exceed maximum junction temperature, TJ(max). Refer to power derating curve charts. Device will survive the current level specified, but operation within magnetic specification cannot be guaranteed. 3 Short circuit of the output to VCC is protected for the time duration specified. 4 Maximum specification limit is equivalent to I CC(max) + 3 mA. 5 Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for south-polarity magnetic fields. This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated by the absolute value of B, and the sign indicates the polarity of the field (for example, a -100 G field and a 100 G field have equivalent strength, but opposite polarity).
EMC Contact Allegro MicroSystems for EMC performance.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Package Thermal Resistance Symbol RJA Test Conditions* Package K, 1-layer PCB with copper limited to solder pads Package L-8 pin, 1-layer PCB with copper limited to solder pads Package L-8 pin, 4-layer PCB based on JEDEC standard *Additional thermal data available on the Allegro Web site. Value Units 177 140 80 C/W C/W C/W
Power Derating Curve
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 20 40
Maximum Allowable VCC (V)
VCC(max) Package L, 4-layer PCB (RJA = 80 C/W) Package L, 1-layer PCB (RJA = 140 C/W) Package K, 1-layer PCB (RJA = 177 C/W) VCC(min)
60 80 100 120 140 160 180
Temperature (C)
Power Dissipation versus Temperature
1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 20 40
Power Dissipation, PD (m W)
P (R ack ag J A= e 80 L, 4 C -la /W ye Pa cka ) rP (R ge C JA B L, =1 1-l 40 aye C rP /W CB Pac ) (R kage K JA = , 1la 177 C/ yer PC W) B
60
80 100 120 140 Temperature, TA (C)
160
180
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Functional Description
occurs on each clock edge, resulting in a 340 kHz chop frequency. This high-frequency operation allows for a greater sampling rate, which produces higher accuracy and faster signal processing capability. This approach desensitizes the chip to the effects of thermal and mechanical stress. The disadvantage to this approach is that jitter, also known as 360 repeatability, can be induced on the output signal. The sample-andhold process, used by the demodulator to store and recover the signal, can slightly degrade the signalto-noise ratio. This is because the process generates replicas of the noise spectrum at the baseband, causing a decrease in jitter performance. However, the improvement in switchpoint performance, resulting from the reduction of the effects of thermal and mechanical stress, outweighs the degradation in the signal-to-noise ratio. This technique produces devices that have an extremely stable quiescent Hall element output voltage, are immune to thermal stress, and have precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process, which allows the use of low-offset and lownoise amplifiers in combination with high-density logic integration and sample-and-hold circuits. This process is illustrated in the following diagram.
Chopper-Stabilized Technique
When using Hall effect technology, a limiting factor for switchpoint accuracy is the small signal voltage developed across the Hall element. This voltage is disproportionally small relative to the offset that can be produced at the output of the Hall device. This makes it difficult to process the signal and maintain an accurate, reliable output over the specified temperature and voltage range. Chopper stabilization is a unique approach used to minimize Hall offset on the chip. The patented Allegro technique, dynamic quadrature offset cancellation, removes key sources of the output drift induced by thermal and mechanical stress. This offset reduction technique is based on a signal modulation-demodulation process. The undesired offset signal is separated from the magnetically induced signal in the frequency domain through modulation. The subsequent demodulation acts as a modulation process for the offset, causing the magnetically-induced signal to recover its original spectrum at the baseband level, while the dc offset becomes a high-frequency signal. Then, using a low-pass filter, the signal passes while the modulated dc offset is suppressed. The chopper stabilization technique uses a 170 kHz high-frequency clock. The Hall element chopping
Regulator
Sample and Hold
Amp
LowPass Filter
Chopper stabilization circuit (dynamic quadrature offset cancellation)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Typical Applications Operation
V+ Switch to High Switch to Low VOUTPUT(OFF)
VOUTPUT
VOUTPUT(ON)(sat) BRP B+ BOP BHYS
Output voltage in relation to sensed magnetic flux density. Output on each channel independently follows the same pattern of transition through BOP followed by transition through BRP.
Channel A M agnetic Field at Hall Element E1
Channel B M agnetic Field at Hall Element E2
Channel A Output Signal at OUTPUTA Channel B Output Signal at OUTPUTB
Quadrature output signal configuration. The outputs of the two output channels have a phase difference of 90 when used with a properly designed magnet that has an optimal pole pitch of twice the Hall element spacing of 1.0 mm.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Typical Applications Circuits
protection is generally required to protect the device against supply-side transients. Specifications for such transients vary for each application, so the design of the protection circuit should be optimized for each application. For example, the circuit shown in the unregulated supply diagram includes a Zener diode that offers high voltage load-dump protection and noise filtering by means of a series resistor and capacitor. In addition, it includes a series diode that protects against high-voltage reverse battery conditions.
VOUTPUTB VOUTPUTA 2
OUTPUTA
This device requires minimal protection circuitry during operation with a low-voltage regulated line. The on-chip voltage regulator provides immunity to power supply variations between 3.3 and 18 V. Because the device has open-drain outputs, pull-up resistors must be included. If protection against coupled and injected noise is required, then a simple low-pass filter on the supply (RC) and a filtering capacitor on each of the outputs may also be needed, as shown in the unregulated supply diagram. For applications in which the device receives its power from unregulated sources, such as a car battery, full
VSupply
1
A3425
VCC OUTPUTB
3
GND
0.1 uF
4
Regulated supply
VOUTPUTB VOUTPUTA
2
OUTPUTA
VSupply 100
1
A3425
VCC OUTPUTB
3
GND
4 0.1 uF
Unregulated supply
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
9
A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Typical Thermal Performance
The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RJC, is relatively small component of RJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN x IIN T = PD x RJA TJ = TA + T (1) (2) (3)
Example: Reliability for VCC at TA = 150C, package L, using minimum-K PCB Observe the worst-case ratings for the device, specifically: RJA = 140 C/W, TJ(max) = 165C, VCC(max) = 18 V, and ICC(max) = 6 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: Tmax = TJ(max) - TA = 165 C - 150 C = 15 C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = Tmax / RJA = 15C / 140 C/W = 107 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) / ICC(max) = 107 mW / 6 mA = 18 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages VCC(est). Compare VCC(est) to VCC(max). If VCC(est) VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RJA. If VCC(est) VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions.
For example, given common conditions such as: TA= 25C, VCC = 12 V, ICC = 4 mA, and RJA = 140 C/W, then: PD = VCC x ICC = 12 V x 4 mA = 48 mW T = PD x RJA = 48 mW x 140 C/W = 7C TJ = TA + T = 25C + 7C = 32C A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RJA and TA.
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Electrical Operating Characteristics, Package L
ICC(off) ICC(off) 8 7 6 -40C 25C 150C Current (mA) 5 4 3 2 1 0 3.3 V 18 V
8 7 6 Current (mA) 5 4 3 2 1 0 0 5 10 VCC (V) 15 20
-50
0
50
100
150
200
Temperature (C)
ICC(on) 8 7 6 Current (mA) -40C 25C 150C Current (mA) 5 4 3 2 1 0 0 5 10 VCC (V) 15 20 8 7 6 5 4 3 2 1 0 -50 0 50
ICC(on)
3.3 V 18 V
100
150
200
Temperature (C)
Output Saturation Voltage VCC = 3.3 V, Isink = 20 mA 500 400 Vsat (mV) 300 200 100 0 -50 0 50 100 150 200 Ch. A Ch. B
Temperature (C)
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Magnetic Operating Characteristics, Package L
Channel A, BOP and BRP Channel A, BOP and BRP 30 BOP BRP -40C 25C 150C 20 Switchpoint (G) 10 0 -10 -20 -30 -50 0 50 100 150 200 BOP BRP
30 20 Switchpoint (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20
3.3 V 12 V 18 V
Temperature (C)
Channel B, BOP and BRP 30 20 Switchpoint (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 BOP BRP -40C 25C 150C 30 20 Switchpoint (G) 10 0 -10 -20 -30 -50 0
Channel B, BOP and BRP
BOP BRP 3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
Channels A and B, Hysteresis 30 25 BOP - BRP (G) BOP - BRP (G) 20 15 10 5 0 0 5 10 VCC (V) 15 20 -40C 25C 150C 30 25 20 15 10 5 0 -50
Channels A and B, Hysteresis
3.3 V 12 V 18 V
0
50
100
150
200
Temperature (C)
Additional magnetic characteristics on next page
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Magnetic Operating Characteristics, Package L (continued)
BOP Symmetry 30 20 Ch. A - Ch. B (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 Ch. A - Ch. B (G) -40C 25C 150C 30 20 10 0 -10 -20 -30 -50 0
BOP Symmetry
3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
BRP Symmetry 30 20 Ch. A - Ch. B (G) Ch. A - Ch. B (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 -40C 25C 150C 30 20 10 0 -10 -20 -30 -50 0
BRP Symmetry
3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
Additional magnetic characteristics on next page
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13
A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Magnetic Operating Characteristics, Package L (continued)
Channel A Symmetry 30 20 BOP + BRP (G) -40C 25C 150C BOP + BRP (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 30 20 10 0 -10 -20 -30 -50 0
Channel A Symmetry
3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
Channel B Symmetry 30 20 BOP + BRP (G) BOP + BRP (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 -40C 25C 150C 30 20 10 0 -10 -20 -30 -50 0
Channel B Symmetry
3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Electrical Operating Characteristics, Package K
ICC(off) ICC(off) 8 7 6 -40C 25C 150C Current (mA) 5 4 3 2 1 0 3.3 V 18 V
8 7 6 Current (mA) 5 4 3 2 1 0 0 5 10 VCC (V) 15 20
-50
0
50
100
150
200
Temperature (C)
ICC(on) 8 7 6 Current (mA) -40C 25C 150C Current (mA) 5 4 3 2 1 0 0 5 10 VCC (V) 15 20 8 7 6 5 4 3 2 1 0 -50 0 50
ICC(on)
3.3 V 18 V
100
150
200
Temperature (C)
Output Saturation Voltage VCC = 3.3 V, Isink = 20 mA 500 400 Vsat (mV) 300 200 100 0 -50 0 50 100 150 200 Ch. A Ch. B
Temperature (C)
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Magnetic Operating Characteristics, Package K
Channel A, BOP and BRP Channel A, BOP and BRP 30 BOP BRP -40C 25C 150C 20 Switchpoint (G) 10 0 -10 -20 -30 -50 0 50 100 150 200 BOP BRP
30 20 Switchpoint (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20
3.3 V 12 V 18 V
Temperature (C)
Channel B, BOP and BRP 30 20 Switchpoint (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 BOP BRP -40C 25C 150C 30 20 Switchpoint (G) 10 0 -10 -20 -30 -50 0
Channel B, BOP and BRP
BOP BRP 3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
Channels A and B, Hysteresis 30 25 BOP - BRP (G) BOP - BRP (G) 20 15 10 5 0 0 5 10 VCC (V) 15 20 -40C 25C 150C 30 25 20 15 10 5 0 -50
Channels A and B, Hysteresis
3.3 V 12 V 18 V
0
50
100
150
200
Temperature (C)
Additional magnetic characteristics on next page
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Magnetic Operating Characteristics, Package K (continued)
BOP Symmetry 30 20 Ch. A - Ch. B (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 Ch. A - Ch. B (G) -40C 25C 150C 30 20 10 0 -10 -20 -30 -50 0
BOP Symmetry
3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
BRP Symmetry 30 20 Ch. A - Ch. B (G) Ch. A - Ch. B (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 -40C 25C 150C 30 20 10 0 -10 -20 -30 -50 0
BRP Symmetry
3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
Additional magnetic characteristics on next page
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17
A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Magnetic Operating Characteristics, Package K (continued)
Channel A Symmetry 30 20 BOP + BRP (G) -40C 25C 150C BOP + BRP (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 30 20 10 0 -10 -20 -30 -50 0
Channel A Symmetry
3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
Channel B Symmetry 30 20 BOP + BRP (G) BOP + BRP (G) 10 0 -10 -20 -30 0 5 10 VCC (V) 15 20 -40C 25C 150C 30 20 10 0 -10 -20 -30 -50 0
Channel B Symmetry
3.3 V 12 V 18 V
50
100
150
200
Temperature (C)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Package K, 4-pin SIP
.208 5.28 .203 5.16
D
.0394 1.00 NOM .0828 2.10 D NOM .0520 1.32 NOM
D
C
.063 1.60 .059 1.50
B
.138 3.51 .133 3.38
E1 .045 1.14 MIN .085 2.16 MAX
E2 A .033 0.84 NOM
.021 0.53 MAX
.600 15.24 .560 14.22
.017 0.44 .014 0.35
1
2
3
4
.019 .014
0.48 0.36
.050 1.27 NOM
Dimensions in inches Millimeters in brackets, for reference only Case dimensions exclusive of mold flash or gate burrs Mold flash .010 [0.25] MAX, gate burr .008 [0.20] MAX, dambar protrusion .004 [0.10] MAX Exact case and lead configuration at supplier discretion within limits shown A Dambar removal protrusion (8X)
B Ejector mark on opposite side C D
Active Area Depth .0165 [0.42] NOM Hall elements E1, E2 (not to scale)
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
Package L, 8-pin SOIC
6.20 .244 5.80 .228 0.25 [.010] M B M 5.00 .197 4.80 .189
D 1.96
A
.077 .039 8 B
C
NOM
D 1.00
NOM
8 0 0.25 .010 0.17 .007
D 1.96
.077
NOM
E1
E2 4.00 .157 3.80 .150 A 1.27 .050 0.40 .016
1
D
2 0.25 .010 C SEATING PLANE GAUGE PLANE
1.40 .055 NOM SEATING PLANE 1.75 .069 1.35 .053 0.25 .010 0.10 .004
8X 0.10 [.004] C 8X 0.51 .020 0.31 .012 0.25 [.010] M C A B 1.27 .050
2.50 .098 REF
Preliminary dimensions, for reference only Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only (reference JEDEC MS-012 AA) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area
B
Reference pad layout (reference IPC SOIC127P600-8M); adjust as necessary to meet application process requirements Active Area Depth 0.40 [0.016] Hall elements E1, E2 (not to scale), U.S. Customary dimensions controlling
B
4.90 .193 REF
C D
0.65 .026 MAX
1.27 .050 REF
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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A3425
Ultra-Sensitive Dual-Channel Quadrature Hall-Effect Bipolar Switch
The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copyright (c) 2005, 2006, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
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